It is stated that the Dwarka I/O chip and the Mathura memory chip will both use TSMC’s N3C process TSMC’s N3C process. One slide shows an A0 tape release planned for October 2026, with production targeted for mid-2028 and launch towards the end of this year. Another roadmap entry indicates that a PCIe Gen 7 platform will arrive around 2029, perhaps as a mid-generation refresh on a new socket.
Buyers of current-generation AMD platforms may not need to change sockets to benefit from the next architectural leap, and laptop users in particular should see some of the biggest gains. Leaked documents indicate that Zen 7 CCDs are backward compatible with previous generation Kedar and Weisshorn IO dies, while Silverton CCDs will work with Badri, Kedar, Puri and Dwarka IODs in SP7 and SP8 packages, with support for 2, 4, 6 or 8 CCDs per socket. Support for Threadripper and HEDT via the Dwarka IOD is explicitly mentioned.
A separate performance chart for the consumer-facing Silverton and Silverking chiplets shows per-core gains of 16-20% for sub-9W server workloads, and 30-36% in 3W/core client APU scenarios, indicating improvements particularly strong efficiencies for thin and light laptops.
Tom speculates that the similar width of the 36-core Steamboat CCD compared to the 16-core Silverton could theoretically allow AMD to integrate two Steamboats on AM5 to achieve a 72-core desktop chip, although no leaked slides confirm such a product. The leaker himself suggests that such a part would more likely be aimed at do-it-yourself customers rather than the DIY market.
Watch his video, linked below, for a detailed look at the information disclosed and his perspective.
/2026/04/17/69e297d8547d7072574345.jpg "The French game “Clair Obscur: Expedition 33” is crowned best video game at the Bafta Games Awards")
